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CLP200M ? overvoltage and overcurrent protection for telecom line application specific discretes a.s.d. ? powerso-10 tm schematic diagram main applications any telecom equipment submitted to transient overvoltages and lightning strikes such as : analog and isdn line cards pabx main distribution frames primary protection modules description the CLP200M is designed to protect telecommuni- cation equipment.it provides both a transient over- voltage protection and an overcurrent protection. it is housed in a powerso-10 tm package. features dual bidirectional protection device. high peak pulse current : ipp = 100a (10/1000 m s surge) max. voltage at switching-on : 290v min. current at switching-off : 150ma failure status output pin benefits both primary and secondary protection levels in one device. voltage and current controlled suppression. surface mounting with powerso-10 tm package. line card cost reduction thanks to the very low power rating of external components required : balanced resistors, ring relay, low voltage slic protection. complies with the following standards : ccitt k20 : 10 / 700 m s 4kv 5 / 310 m s 100 a bellcore tr-nwt-000974 10 / 1000 m s 1kv 10 / 1000 m s 100a nc fs tip s ring s tip l tip l tip l ring l ring l ring l tab is connected to gnd 1 february 1998 ed : 3 1/21
block diagram overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or tipl tips ringl rings fs gnd sw3 sw1 sw4 sw2 pin symbol description 1 fs failure status 2 tips tip (slic side) 3 / 4 / 5 tipl tip (line side) 6 / 7 / 8 ringl ring (line side) 9 rings ring (slic side) 10 nc not connected tab gnd ground ? CLP200M 2/21
fig. 1 : subscriber line protection topology oprimary protectiono osecondary protectiono mdf line card telecommunication exchange line osecondary protectiono mdf line card telecommunication exchange line CLP200M slic thdtxx or lpc1511d or lb200b slic CLP200M fig. 2 : line card protection -i swon programmable thanks to an external resistor programmable thanks to any external voltage reference v i line card operating conditions +i swon application note 1. introduction the aim of this section is to show the behavior of our new telecom line protectiondevice. this device includes a primary protection level and is suitable for main distribution frames and line cards. this protection concept is explained and, in addition, the CLP200M performances are analysed when facing different surges as described in the ccitt recommendations. figure 1 is a simplified block diagram of a sub- scriber line protection that is mainly used so far. this shows two different things : a oprimary protectiono located on the main distri- bution frame (mdf) eliminates coarsely the high energy environmental disturbances (lightning transients and ac power mains disturbances) a osecondary protectiono located on the line card includes a primary protectionlevel (first stage)and a residual protection (second stage) which elimi- nates finely the remaining transients that have not beentotally suppressed by the first stage. the CLP200M can be used both in mdfs and in line cards. in that case, any line card may be swapped from one mdf to another one without re- ducing the efficiency of the whole system protec- tion. the ccitt requirements are different for these two protection locations (mdfs and line cards). concerning the oprimary protectiono, the ccitt re- quires a 4kv, 10/700 m s surge test whereas the osecondary protectiono has to withstand a 1kv, 10/700 m s surge test. the explanations which follow are ba sically coveringthelinecardapplication. 2. sgs-thomson CLP200M concept 2.1 evolution of the slic protection over the years, the silicon protection per- formances have considerably changed. the first generation of products like smthbtxx and smthdtxx offered fixed overvoltage protec- tion against surges on either tip or ring line in four packages. the following generation like thbtxx and thdtxx still offered fixed overvoltage protection against surges on both tip and ring lines in two package s. the next step was the introduction of the lcp1511d which brought the advantage of full programmable voltage. today, the CLP200M combines the features of all the previous generations. in addition to that, it of- fers an overcurrent detection when operating in speech mode and also a failure status output sig- nal. the figure 2 summarizes the performance of the CLP200M which basically holds the slic inside its correct voltage and current values. ? CLP200M 3/21
application circuit : CLP200M in line card fig. 3 : CLP200M in line card rings -vbat -vbat rp r sense tip 1 1 2 2 slic (*) (*) lcp1511d or thdt series overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or tipl tips ringl fs gnd sw3 sw1 sw4 sw2 r sense rp ring generator fuse fuse tip ring external voltage reference ring i figure 3 above shows the topology of a protected analog subscriber line at the exchange side. the CLP200M is connected to the ring relay via two balanced rp resistors, and to the subscriber line interface circuit. a second device is located near the slic : it can be either a lcp1511d or a thdt series. these two devices are complementary and their functions are explained below : the first stage based on CLP200M manages the high power issued from the external surges. when used in ringing mode, the CLP200M operates in voltage mode and pro- vides a symmetrical and bidirectional overvoltage protection at +/-215 v on both tip and ring lines. when used in speech mode, the CLP200M operates in current mode and the activation current of the CLP200M is ad- justed by r sense . the second stage is the external voltage refer- ence device which defines the firing threshold voltage during the speech mode and also as- sumes a residual power overvoltage suppression. this protection stage can be either a fixed or programmable breakover device. the thdtxx family acts as a fixed breakover device while the lcp1511d operates as a programma- ble protection. thanks to this topology, the surge current in the line is reduced after the CLP200M. because the remaining surge energy is low, the power ratings of rp, the ring relay contacts and the externalvoltage reference circuit may be downsized. this results in a significant cost reduction. ? CLP200M 4/21
2.3 ringing mode fig. 4 : switching by voltage during ringing mode. rsense rp 1 2 overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or tipl tips fs sw3 sw1 fuse tip gnd i lg v lg 1/2 CLP200M i lg v lg 1 2 3 -215 +215 a1 fig. 5a : method to adjust the reference voltage . rings r sense rp 1 2 overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or tipl tips ringl fs gnd sw3 sw1 sw4 sw2 r sense 1 2 rp fuse fuse tip ring vz1 vz2 vz3 vz4 in ringing mode (ring relay in position 2), the only protectiondevice involved is the CLP200M. in normal conditions, the CLP200M operates in re- gion 1 of a1 curve, and is idle. if an overvoltage occuring between tip (or ring) and gnd reaches the internal overvoltage refe- rence (+/- 215v), the CLP200M acts and the line is short-circuited to gnd. at this time the operating point moves to region 2 for positive surges (region 3 for negative surges). once the surge current dis- appears, the device returns to its initial state (re- gion 1). for surges occuring between tip and ring, the CLP200M acts in the same way. this means that the CLP200M ensures a tripolar protection. when used alone, the CLP200M acts at the inter- nal overvoltage reference level (+/- 215v). further- more, it is possible to adjust this threshold level to a lower voltage by using : . up to 4 fixed external voltage reference (v z1 to v z4 ) (see fig.5a). ? CLP200M 5/21
external reference supplies, v b1 and v b2 (see fig.5b). . fig. 5b : method to adjust the reference voltage . rings r sense rp 1 2 overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or tipl tips ringl fs gnd sw3 sw1 sw4 sw2 r sense 1 2 rp fuse fuse tip ring vb1 vb2 2.4 speech mode fig. 6 : switching by current during speech mode . r sense rp 1 2 overvoltage reference (+/- 215 v) overvoltage detector overcurrent detector or tipl tips fs sw3 sw1 fuse tip gnd -vbat external voltage reference i lg v lg i lg v a2 lg 4 5 6 v ref1 -v ref2 in speech mode (ring relay in position 1), the pro- tection is provided by the combination of both CLP200M and the external voltage reference de- vice. in normal conditions, the working point of this cir- cuit is located in region 4 of a2 curve : the CLP200M is idle. when a surge occurs on the line, the external volt- age reference device clamps at gnd or -v bat re- spectively for positive and negative surges. this generates a current which is detected by r sense and causes the protection to act : the line is short-circuited to gnd. the operating point moves to region 5 for positive surges or region 6 for negative surges. once the surge current falls below the switching- off current i swoff , the CLP200M returns to its in- itial state (region 4). furthermore, the CLP200M switches when an overvoltage, either positive or negative, occurs either : simultaneously on both tip and ring lines ver- sus gnd. between tip and ring. on tip (or ring) versus gnd. ? CLP200M 6/21
fig. 7a and 7b : switching-on current versus r sense . fig. 9 : operation limits and destructionzone of the CLP200M. fig. 8 : failure status circuit and diagnostic. 3 5 7 9 11 13 100 200 300 500 rsense ( ) w iswon (ma) -20 c25 c75 c 357911 100 200 300 500 rsense ( ) w iswon @ 25 c (ma) iswon min iswon max iswon min iswon min negative negative positive positive CLP200M rsense rsense 1 failure +12v 1k status 0.01 0.1 1 10 10 100 1000 t (ms) ipp (a) the choice of the switching-on current is function of the r sense resistors. in normal operating condition, only the negative current of the signal is of interest.this current (typi- cally below -150 ma) should not activate the pro- tection device CLP200M. therefore the level of activation is to be chosen just above this limit (typi- cally -200 ma). this level is adjusted through r sense . figures 7a and 7b enable the designers to choose the right r sense value. example : the choice of r sense =4 w ensures a negative triggering of -220 ma min and -320 ma max. in this case, the positive triggering will be 180ma min and 280 ma max. 2.5 . failure status the CLP200M has an internal feature that allows the user to get a failure status (fs) indication. when the CLP200M is short-circuiting the line to gnd, a signal can be managed through pin 1. this signal can be used to turn a led on in order to pro- vide a surge indication. it may also be used with a logic circuitry to count the number of disturbances appearing on the lines. if a surge exceeding the maximum ratings of the CLP200M occurs on the line, the device will fail in a short-circuit state. the figure 9 shows two different curves : the lower one indicates the maximum guaranted working limits of the CLP200M. the upper curve shows the limit above which the CLP200M is completely destructed . in this case, the fail diagnostic pin is on. ? CLP200M 7/21
fig. 10 : transversal and longitudinal test topologies. fig. 12 : power contact test circuit. fig. 11 : power induction test circuit. aorb bora e 15 25 0.2 m f 50 20 m f 4kv item under test a b e 15 25 0.2 m f 50 20 m f item under test 25 4kv transversal test longitudinal test a b r1 item under test r2 1 m f 1 m f e s2 s1 100 a b <10 item under test <10 e 600 600 3. CLP200Mtests results according to ccitt k20 recommendations 3.1 ccitt k20 recommendations in respect with the ccitt recommendations, the CLP200M has to withstand three kinds of distur- bances. 3.1.1. lightning simulation (test 2, table 2/k20) this test shall be done in transversaland longitudi- nal modes as shown in figure 10. the test generator is the 10/700 m s with 4kv of peak voltage. 3.1.2. power induction (test 3a and 3b, table 2/k20) two kinds of tests using the same circuit topology (see fig.11) are defined in the ccitt k20. test 3a : vac(max) = 300v rms , r1 = r2 = 600 w s2 operating and test duration = 200 ms. test 3b : vac(max) = 300v rms (*), r1 = r2 = 200 w s2 operating and test duration not defined. (*) recommended value. 3.1.3. power contact (test 3, table 1/k20) this test shall be done with the test circuit of figure 12. vac(max) = 220v rms , with switch s in each posi- tion and duration 15 min. 3.1.4. acceptance criteria and number of tests for the tests described in chapter3.1.1., 3.1.2. and 3.1.3. two criteria are defined : a: equipment shall withstand the test without dam- age and shall operate properly within the specified limits. b: a fire hazard should not occur in the equipment as a result of the tests. the criteria are affected to the different tests as mentioned in the table 1. ? CLP200M 8/21
test acceptance criteria number to tests 2 a 10 for longitudinal a 10 for longitudinal b and 10 for transversal 3a a 5 3b b 1 3 b 1 for each position of s table 1 : acceptance criteria and number of tests. fig. 13 : lightning simulation test. 10/700 m s generator +/- 4kv 4 w i v rsense rp tipl tips gnd 1/2 CLP200M fig. 14 : CLP200M response to a positive surge. fig. 15 : CLP200M response to a negative surge. fig. 16 : power inductance test . test v (rms) r( w ) duration 3a 300 600 0.2s 3b 300 200 ? 3.2. ringing mode 3.2.1. lightning simulation test lightning phenomena are the most common surge causes. the purpose of this test is to check the ro- bustness of the CLP200M against these lightning strikes. figures 14 and 15 show that the remaining over- voltage does not exceed +/- 260 v. the CLP200M switches on within 0.7 m s and withstands the 100 a given by the ccitt k20 generator. consequently,the CLP200M totally fulfills this test. 3.2.2 power induction (test 3a and 3b table 2/k20) surges of long duration with medium voltage value are mainly produced by the proximity of a sub- scriber line with an ac mains line or equipment. the purpose of this test is to checkthe robustness of the CLP200M against these capacitive coupling disturbances. ? CLP200M 9/21
fig. 17 : CLP200M response to the induction test (test 3a). fig. 18 : CLP200M reponse to the induction test (test 3b). fig. 19 : power contact test. fig. 20 : power contact test 3 (with 10 w series). 4 i v v(rms) 50hz 600 < 10 ww 15min ptc rsense rp or tipl tips gnd 1/2 CLP200M fig. 21: lightning test in speech mode. 10/700 m s generator +/- 4kv 4 tipl tips gnd 1/2 CLP200M i v1 50 i2 slic lcp1511d -48v v2 1 rsense rp figures 17 and 18 show that the remaining voltage does not exceed 270 v. consequently,the CLP200M totally fulfills this test. the test duration is not specified in test 3b. if the duration exceeds 5s we do suggest to follow the soldering and mounting recommendations given on page 17 of this document. 3.2.3 power contact (test 3 table 1/k20) this long duration surge is produced when con- necting a subscriber line to an ac mains line or equipment. the purpose of this test is to check the robustness of the CLP200M against these distur- bances. the test 3 of ccitt k20 requires a serial ptc (or fuse) which is inserted in the test circuit to limit the current rate. this ptc acts like an open-circuit in a non-instantaneous way when a surge occurs on the line. meanwhile, the CLP200M has to with- stand the surge. figure 20 shows that the remaining overvoltage does not exceed 250 v and shows that the ptc acts like an open-circuit after 60 ms. consequently,the CLP200M totally fulfills this test. 3.3. speech mode 3.3.1. lightning simulation test (test 2, table 2/k20) ? CLP200M 10/21
fig. 22 : CLP200M response to a positive surge. fig. 23 : clp200 m response to a negative surge. fig. 24 : power induction test. 4 w tipl tips gnd 1/2 CLP200M i v1 50 i2 slic lcp1511d -48v v2 1 rsense rp v(rms) 50 hz test v (rms) r( w ) duration 3a 300 600 0.2s 3b 300 200 ? fig. 25 : induction test behavior (test 3a). figures 22 and 23 give the voltage and current be- havior during positive and negative 4kv, 10/700 m s, surge tests using a lcp1511d as second stage protection device. the firing threshold values are now adjusted to gnd and to -vbat (-48v) by the action of the second stage protectionwhich acts as an external voltage reference. as shown on these figures, the maximum remain- ing voltage does not exceed +2.5v for positive surges and -60v for negative surges. consequently,the CLP200M totally fulfills this test. 3.3.2 power induction test (test 3a and 3b, table 2/k20) figures 25 and 26 show that the maximum remain- ing voltage does not exceed +2v for positive surges and -55v for negative surges. consequently,the CLP200M totally fulfills this test. the test duration is not specified in test 3b. if the duration exceeds 5s we do suggest to follow the soldering and mounting recommendations given on page 17 of this document. ? CLP200M 11/21
fig. 26 : induction test behavior (test 3b). fig. 28 : powercontact test 3 (with r 10 w series). fig. 27 : power contact test. 4w tipl tips gnd 1/2 CLP200M i v v(rms) 50hz 600 or < 10 15min ptc rsense rp i2 slic lcp1511d -48v v2 3.3.3 - power contact test (test 3 table 1/k20) the test 3 of ccitt k20 requires a serial ptc (or fuse) which is inserted in the test circuit to limit the current rate. this ptc acts like an open-circuit af- ter 60 ms when a surge occurs on the line. mean- while, the CLP200M has to withstand the surge. the protection device CLP200M totally fulfills this test. ? CLP200M 12/21
symbol parameter test conditions value unit i pp line to gnd peak surge current 10/1000 m s (open circuit voltage wave shape 10/1000 m s) 100 a 5/310 m s (open circuit voltage wave shape 10/700 m s) 130 a i tsm mains power induction current v rms = 300v, r = 600 w t = 200ms 0.5 a mains power contact current v rms = 220v, r = 10 w (failure status threshold) t = 200 ms 22 a v rms = 220v, r = 600 w t = 15 mn 0.30 a t stg t j storage temperature range maximum junction temperature - 40 to + 150 150 c t l maximum lead temperature for soldering during 10 s 260 c absolute maximum ratings (r sense =4 w , and t amb =25 c) symbol parameter test conditions value unit min. max. i lgl line to gnd leakage current . v lg = 200 v . measured between tip (or ring) and gnd 10 m a v ref overvoltage internal reference . i lg =1ma . measured between tip (or ring) and gnd 215 v v swon line to gnd voltage at sw1 or sw2 switching-on . measured at 50 hz between tipl (or ringl) and gnd 290 v i swoff line to gnd current at sw1 or sw2 switching-off . refer to test circuit page 14 150 ma i swon line current at sw1 or sw2 switching-on . positive pulse . negative pulse 180 220 280 320 ma c line to gnd capacitance . v lg =-1v+1v rms . f = 1 mhz 200 pf electrical characteristics (r sense =4 w , and t amb =25 c) ? CLP200M 13/21
test circuit for i swoff parameter : go-no go test r -v p v bat -48v = surge generator d.u .t. this is a go-no go test which allows to confirm the switch-off (i swoff ) level in a functionaltest circuit. test procedure : - adjust the current level at the i swoff value by short circuiting the d.u.t. - fire the d.u.t. with a surge current : i pp = 10a, 10/1000 m s. - the d.u.t. will come back to the off-state within a duration of 50ms max. 3 5 7 9 11 13 100 200 300 500 rsense ( ) w iswon (ma) -20 c25 c75 c fig. 29 : typical variation of switching-on current (positive or negative) versus r sense resistor and junction temperature (see test condition fig 31). 357911 100 200 300 500 rsense ( ) w iswon @ 25 c (ma) iswon min iswon max iswon min iswon min negative negative positive positive fig. 30 : variation of switching-on current versus r sense at 25 c. tip l tip s gnd r sense ring l ring s dut r r l i1 48 v fig. 31 : i swon measurement - iswon = i1 when the CLP200M switches on (i1 is progressively increased using r) - both tip and ring sides of the CLP200M are checked -r l =10 w . -40 -20 0 20 40 60 80 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 tj ( c) iswoff [tj c] / iswoff [25 c] fig. 32 : relative variation of switching-off current versus junction temperature for r sense between3 and 10 w . ? CLP200M 14/21
46810 0.4 0.6 0.8 1.0 1.2 1.4 1.6 rsense ( ) w iswoff [rsense] / iswoff [4 w ] fig. 33 : relative variation of switching-off current versus r sense (between 3 and 10 w ). fig. 34 : residual current l1 after the CLP200M. the residual current l1 is defined by its peak value (i p ) and its duration ( t )@i p /2 . current surge input residual current after the CLP200M waveform( m s) i pp (a) peak current i p (a) waveform t( m s) 5/310 130a positive surge negative surge 4.2 1.1 1 0.5 tipl tips gnd r sense ringl rings dut r = 50 ohms surge generator -48v i1 0.1 0.3 1 3 10 30 100 300 1000 0.98 1.00 1.02 1.04 1.06 1.08 1.10 1.12 dv/dt (v/ m s) v swon / ref v fig. 35 : relative variation of switching-on voltage versus dv/dt with an external resistor of 4 w . -40 -20 0 20 40 60 0.85 0.90 0.95 1.00 1.05 1.10 tj ( c) v ref [tj c] / v [25 c] ref fig. 36 : relative variation of internal reference voltage versus junction temperature (i lg =1ma). ? CLP200M 15/21
0 102030405060 40 60 80 100 120 140 160 180 200 220 (v) c (pf) v r fig. 37 : junction capacitance (tipl/gnd) versus applied voltage fig. 38 : typical and maximal capacitance between tipl, ringl and gnd. v tipl = - 48 v v ringl # 0 v v gnd = 0 v capacitance between ringl and gnd capacitance between tipl and gnd capacitance between tipl and ringl typ. 195 62 57 max. 200 0.1 1 10 100 1000 0.1 1 10 100 i tsm (a) t (s) fig. 39 : maximum non repetitive surge rms on state current versus overload duration (with 50hz sinusoidal wave and initial junction temperature equal to 25 c) 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 30 50 100 200 300 t (ms) ipp (a) fig. 40 : maximum peak pulse current versus surge duration ? CLP200M 16/21
fig 1 : typical reflow soldering heat profile time (s) temperature ( c) 0 40 80 120 160 200 240 280 320 360 0 50 100 150 200 250 o 215 c o soldering preheating cooling 245 c o epoxy fr4 board metal-backed board soldering recommendation the soldering process causes considerable ther- mal stress to a semiconductor component. this has to be minimized to assure a reliable and ex- tended lifetime of the device. the powerso-10 tm package can be exposed to a maximum tempera- ture of 260 c for 10 seconds. however a proper soldering of the package could be done at 215 c for 3 seconds. any solder temperature profile should be within these limits. as reflow techniques are most common in surface mounting, typical heating profiles are given in figure 1,either for mounting on fr4 or on metal-backed boards. for each particular board, the appropriate heat profile has to be adjusted experimentally. the present proposal is just a starting point. in any case, the fol- lowing precautions have to be considered : - always preheat the device - peak temperature should be at least 30 c higher than the melting point of the solder alloy chosen - thermal capacity of the base substrate voids pose a difficult reliability problem for large surface mount devices. such voids under the pack- age result in poor thermal contact and the high thermal resistance leads to component failures. the powerso-10 is designed from scratch to be solely a surface mount package, hence symmetry in the x- and y-axis gives the package excellent weight balance. moreover, the powerso-10 offers the unique possibility to control easily the flatness and quality of the soldering process. both the top and the bottom soldered edges of the package are accessible for visual inspection (soldering menis- cus). coplanarity between the substrate and the pack- age can be easily verified. the quality of the solder joints is very important for two reasons : (i) poor quality solder joints result directly in poor reliability and (ii) solder thickness affects the thermal resis- tance significantly. thus a tight control of this pa- rameter results in thermally efficient and reliable solder joints. ? CLP200M 17/21
fig 2 : mounting on epoxy fr4 head dissipation by extending the area of the copper layer fig 3 : mounting on epoxy fr4 by using copper-filled through holes for heat transfer fr4 board copper foil fr4 board copper foil heat transfer heatsink substrates and mounting information the use of epoxy fr4 boards is quite common for surface mounting techniques, however, their poor thermal conduction compromises the otherwise outstandingthermal performanceof the powerso- 10. some methods to overcome this limitation are discussed below. one possibility to improve the thermal conduction is the use of large heat spreader areas at the cop- per layer of the pc board. this leads to a reduction of thermal resistance to 35 c for 6 cm 2 of the board heatsink (see fig. 2). use of copper-filled through holes on conventional fr4 techniques will increase the metallization and decrease thermal resistance accordingly. using a configurationwith 16 holes under the spreader of the package with a pitch of 1.8 mm and a diameter of 0.7 mm, the thermal resistance (junction - heatsink) can be reduced to 12 c/w (see fig. 3). beside the thermal advantage, this solution allows multi-layer boards to be used. however, a draw- back of this traditional material prevent its use in very high power, high current circuits. for instance, it is not advisable to surface mount devices with currents greater than 10 a on fr4 boards. a power mosfet or schottky diode in a surface mount power package can handle up to around 50 a if better substrates are used. ? CLP200M 18/21
powerso-10 package mounted on r th (j-a) p diss (*) 1.fr4 using the recommended pad-layout 50 c/w 1.5 w 2.fr4 with heatsink on board (6cm 2 )35 c/w 2.0 w 3.fr4 with copper-filled through holes and external heatsink applied 12 c/w 5.8 w 4. ims floating in air (40 cm 2 )8 c/w 8.8 w 5. ims with external heatsink applied 3.5 c/w 20 w (*) based on a delta t of 70 c junction train. table 1 : thermal impedance versus substrate a new technology available today is ims - an insu- lated metallic substrate. this offers greatly en- hanced thermal characteristics for surface mount components. ims is a substrate consisting of three different layers, (i) the base material which is available as an aluminium or a copper plate, (ii) a thermal conductive dielectrical layer and (iii) a copper foil, which can be etched as a circuit layer. using this material a thermal resistance of 8 c/w with 40 cm 2 of board floating in air is achievable (see fig. 4). if even higher power is to be dissipated an external heatsink could be applied which leads to an r th (j-a) of 3.5 c/w (see fig. 5), assuming that r th (heatsink-air) is equal to r th (junction- heatsink). this is commonly applied in practice, leading to reasonable heatsink dimensions. often power devices are defined by considering the maximum junction temperature of the device. in practice , however, this is far from being exploited. a summary of various power management capa- bilities is made in table 1 based on a reasonable delta t of 70 c junction to air. fig 4 : mounting on metal backed board fig 5 : mounting on metal backed board with an external heatsink applied fr4 board copper foil aluminium heatsink copper foil insulation aluminium the powerso-10 concept also represents an at- tractive alternative to c.o.b. techniques. pow- erso-10 offers devices fully tested at low and high temperature. mounting is simple - only conven- tional smt is required - enabling the users to get rid of bond wire problems and the problem to control the high temperature soft soldering as well. an op- timized thermal management is guaranteed through powerso-10 as the power chips must in any case be mounted on heat spreaders before being mounted onto the substrate. ? CLP200M 19/21
package mechanical data e2 e 1 10 5 6 h eb 0.25 m d h a f a1 e4 e3 e1 seating plane seating plane a b c q detail oao 0.10 a b l a1 a detail oao d1 ref. dimensions millimeters inches min. typ. max. min. typ. max. a 3.35 3.65 0.131 0.143 a1 0.00 0.10 0.00 0.0039 b 0.40 0.60 0.0157 0.0236 c 0.35 0.55 0.0137 0.0217 d 9.40 9.60 0.370 0.378 d1 7.40 7.60 0.291 0.299 e 9.30 9.50 0.366 0.374 e1 7.20 7.40 0.283 0.291 e2 7.20 7.60 0.283 0.299 ref. dimensions millimeters inches min. typ. max. min. typ. max. e3 6.10 6.35 0.240 0.250 e4 5.90 6.10 0.232 0.240 e 1.27 0.05 f 1.25 1.35 0. 0492 0.0531 h 13.80 14.40 0.543 0.567 h 0.50 0.019 l 1.20 1.80 0. 0472 0.0708 q 1.70 0.067 a0 8 0 8 package type marking power so-10 tm CLP200M CLP200M marking ? CLP200M 20/21
header shape foot print mounting pad layout recommended shipping tube dimensions (mm) typ a b c length tube 18 12 0,8 532 quantity per tube 50 dimensions in millimeters dimensions in millimeters information furnished is believed to be accurate and reliable. however, sgs-thomson micr oelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in lif esupport devices or systems without express written approval of sgs-thomson microelectronics. ? 1998 sgs-thomson microelectronics - printed in italy - all rights reserved. sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. b c a order code clp 200 m - tr current limiting protection minimum operation voltage package : powerso-10 tr = tape and reel = tube ? CLP200M 21/21

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